CCD and CMOS

Oct 1, 2008 12:00 PM, By Steve Mullen

Understand old and new camera sensor technology.

             
Figure 3

Figure 3
Click to enlarge

All photodiodes in a row are simultaneously connected to all column busses. Each column bus terminates in a bus transistor that charges a sample-and-hold capacitor. The capacitor stores the voltage while a column waits for its turn to be output. When it is time to output a column, transfer transistor passes the stored voltage to an operational (OP) amplifier.

It is not possible to instantaneously output each row after sending it down the column busses. The time required to read out all pixels in a row is called row readout time (RRT). Rows, of course, are read out from a chip in a top-to-bottom sequence.

Adding additional ports to a CMOS sensor reduces RRT by simultaneously outputting multiple samples from a row.

Exposure control

When a camera operator sets a shutter speed, he or she is setting the integration period. For example, with a shutter speed of one-sixtieth second, the integration time is 16ms.

A CMOS chip's top-to-bottom exposure process operates much as a vertical focal plane shutter does in a modern film camera. (See Figure 3.) A curtain (red) is released to start its downward travel at the beginning of the exposure time.

When the first curtain has completed its travel, the film frame is fully exposed. When the exposure time ends, a second curtain (blue) is released to begin its downward travel to close-off the film.

Figure 4. Rolling shutter artifact. This photograph by Henri Lartigue shows a race car skewed in one direction while spectators and telephone poles are skewed in the opposite direction. Lartigue was panning in the direction the car was traveling.

Figure 4. Rolling shutter artifact. This photograph by Henri Lartigue shows a race car skewed in one direction while spectators and telephone poles are skewed in the opposite direction. Lartigue was panning in the direction the car was traveling.

When a film camera is set to a short exposure time, the first curtain will not have traveled far before the second curtain starts chasing it down the frame. The narrow traveling slit formed by the gap between the two curtains exposes the film.

When a scene contains little motion, the difference in time between exposing the top and bottom of a frame creates no harm. However, when the scene contains motion, the time difference between the top and bottom exposure is captured on film as a rolling shutter artifact.

Because a CMOS sensor's rows are processed — reset and output — with an offset equal to RRT, a CMOS sensor also exposes each frame in a top-to-bottom pattern. The row exposure offset creates a rolling shutter skew that matches the direction of the object's movement. (See Figure 4.)

The row exposure offset also is responsible for wobble (a stretchy look when a camcorder is subjected to sudden motion), partial frame exposure (from flash cameras) and fluorescent flicker (bands of shifting scrolling color or flickering dark lines).

Noise reduction

The inherent design of CMOS chips is responsible for many types of picture noise. Dark current noise is one type of fixed pattern noise (FPN). Each photodiode has its own unique level of charge even when there is no light falling on it. Therefore, a matrix of photodiodes has a matrix of noise values. FPN is also introduced by tiny differences among amplifier transistors. These amplifier differences introduce errors as photodiode charges are converted to voltages.

Figure 5

Figure 5
Click to embiggen

FPN noise can be attenuated by a noise reduction technique called correlated double sampling (CDS). CDS requires two readouts of each photodiode. The first readout is performed immediately after a row is reset and is a measure of a pixel's noise. The second readout occurs after the integration period and is a measure of a pixel's noise plus signal.

At the bottom of each column, one sample-and-hold stores the noise voltage. After the integration period, a second sample-and-hold for a column stores the signal-plus-noise voltage.

To output each column, every column is addressed one-by-one. The two stored signals are fed to an OP amplifier. Each OP amplifier subtracts the noise voltage from the signal-plus-noise voltage, thereby yielding a signal voltage.




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