Building a 3Gb/s infrastructure
Jan 1, 2011 12:00 PM, By Mike Waidson
Testing during and after installation ensures success.
By following careful engineering practices during initial planning stages, the transition to a 3Gb/s-SDI infrastructure can be accomplished without too much trouble. It all starts by selecting and carefully installing the correct type of cable designed for high data rates and avoiding incorrect crimping, twists, bends or stress to that cable. During installation, thorough test and measurement procedures are vital to ensure that each link and piece of equipment performs to its specifications. A waveform monitor with eye and jitter measurement capabilities along with appropriate signal generators enables engineers to efficiently detect and investigate physical layer problems with high-speed SDI signals.
Healthy cables, healthy system
Figure 1. One component of the SDI check field, or pathological test signal, tests equalizer operation (shown above in magenta), and another checks phase-locked loop performance (shown on the bottom in grey).
Select figure to enlarge.
Given the importance of the channel as speeds increase, treating cables with respect during installation is critical to a healthy system. HD-SDI or 3Gb/s-SDI signals are less forgiving than an SD-SDI signal, and stress to the cable, which often cannot be physically seen, during installation will reduce margins.
Although it may seem appropriate to bundle up cables nice and tight and to place cable ties or “J” hooks at identical distances apart, these are two common mistakes that lead to problems down the road. The point where the cable hangs from the “J” hook can lead to deformation at a given wavelength that can cause an accumulated reduction in return loss within the system. To prevent this, cable ties should be placed at random distances apart and allow for movement of cables within the bundle.
Using a waveform monitor, you should run a series of measurements including cable loss, cable length and source signal level. These types of measurements can be particularly useful when qualifying a system and verifying its performance. By knowing the performance specification of the cable type used within the installation, you can verify that each link is within expected operational performance for the maximum cable length.
Stress testing
Figure 2. This status display shows the CRC errors of an HD-SDI signal.
Select figure to enlarge.
Unlike analog systems that tend to degrade gracefully, digital systems tend to work without fault until they crash. To date, there are no in-service tests that will measure the headroom of the SDI signal; out-of-service stress tests are required to evaluate system operation. Stress testing consists of changing one or more parameters of the digital signal until failure occurs. The amount of change required to produce a failure is a measure of the headroom of the system.
Starting with the specifications in the relevant serial digital video standard (SMPTE 259M, SMPTE 292M or SMPTE 424M), the most intuitive way to stress the system is to add cable until the onset of errors. Although the video is encoded as a digital data stream, the SDI signal itself is still analog in nature and suffers from the same types of analog distortions, such as attenuation and phase shifts.
SDI check field
The SDI check field (also known as a pathological signal) is a full-field test signal and, therefore, must be done out-of-service. The SDI check field is designed to create a worst-case data pattern for low-frequency energy, after scrambling, in two separate parts of the field. Statistically, these intervals will occur about once per frame.
Figure 3. Shown here is a 3G eye display after about 79ft of cable.
Select figure to enlarge.
One component of the SDI check field tests equalizer operation by generating a scrambled non-return to zero inverted (NRZI) sequence of 19 zeros followed by a one or 19 ones followed by one zero. This part of the test signal may appear at the top of the picture display as a shade of magenta, with the value of luma set to 198h and both chroma channels set to 300h, as shown in Figure 1.
The other part of the SDI check field signal is designed to check phase-locked loop performance with an occasional line consisting of a scrambled NRZI sequence of 20 zeros followed by 20 ones. This provides a minimum number of zero crossings for clock extraction. This part of the test signal may appear at the bottom of the picture display as a shade of grey, with luma set to 110h and both chroma channels set to 200h.
CRC error testing
A cyclic redundancy check (CRC) can be used to provide information to the operator if data does not arrive intact. A unique CRC pair is present in each video line with a separate value for chroma and luma components in 3Gb/s and HD-SDI formats. In HD-SDI and 3Gb/s signals, a CRC is caculated for every line, one for chroma and one for luma. At the receiver, the CRC values are compared to newly calculated values to determine if there is an error.
Figure 4. An eye display shows incorrect termination.
Select figure to enlarge.
A waveform monitor allows the engineer to keep tabs on the number of CRC errors along a transmission path. Ideally, the instrument will show zero errors, indicating an error-free transmission path. If the errors increase to one every hour or minute, the system is approaching the digital cliff, and it's time to investigate the transmission path to isolate the cause of the error.
Visible errors may be noticed on the picture monitor initially as sparkle effects (black and white pixel dropouts) as the receiver fails to recover the data correctly. If the signal degrades further, there will be complete or partial lines that will begin to drop out from the picture display before the picture will freeze or go to black. This indicates the transmission has crossed the digital cliff. To prevent this situation, the health of the physical layer needs to be continuously monitored. (See Figure 2.)
Monitoring eye and jitter
Eye diagrams are invaluable for analyzing serial data signals and diagnosing problems. The basic parameters measured using the eye pattern display are signal amplitude, overshoot, rise time and fall time. Jitter can also be measured with the eye pattern display if the clock recovery bandwidth is specified. As cable length increases, the amplitude of the eye display will decrease and the frequency response will be reduced, causing the rise and fall time of the signal to increase. The eye and jitter display also can be used to analyze the physical layer of the SDI signal, as shown in Figure 3.
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